The invention is directed to printheads for ink jet printers and more specifically to improved printhead structures and methods for making the structures.
Ink jet printers continue to be improved as the technology for making the printheads continues to advance. New techniques are constantly being developed to provide low cost, highly reliable printers which approach the speed and quality of laser printers. An added benefit of ink jet printers is that color images can be produced at a fraction of the cost of laser printers with as good or better quality than laser printers. All of the foregoing benefits exhibited by ink jet printers have also increased the competitiveness of suppliers to provide comparable printers in a more cost efficient manner than their competitors.
One area of improvement in the printers is in the print engine or printhead itself. This seemingly simple device is a microscopic marvel containing electrical circuits, ink passageways and a variety of tiny parts assembled with precision to provide a powerful, yet versatile component of the printer. The printhead components must also cooperate with an endless variety of ink formulations to provide the desired print properties. Accordingly, it is important to match the printhead components to the ink and the duty cycle demanded by the printer. Slight variations in production quality can have a tremendous influence on the product yield and resulting printer performance.
An ink jet printhead includes a semiconductor chip and a nozzle plate attached to the chip. The semiconductor chip is typically made of silicon and contains various passivation layers, conductive metal layers, resistive layers, insulative layers and protective layers deposited on a device surface thereof. The individual heater resistors are defined in the resistive layers and each heater resistor corresponds to a nozzle hole in the nozzle plate for heating and ejecting ink toward a print media. In one form of a printhead, the nozzle plates contain ink chambers and ink feed channels for directing ink to each of the heater resistors on the semiconductor chip. In a center feed design, ink is supplied to the ink channels and ink chambers from a slot or single ink via which is conventionally formed by chemically etching or grit blasting through the thickness of the semiconductor chip.
Grit blasting the semiconductor chip to form ink vias is a preferred technique because of the speed with which chips can be made by this technique. However, grit blasting results in a fragile product and often times creates microscopic cracks or fissures in the silicon substrate which eventually lead to chip breakage and/or failure. Furthermore, grit blasting cannot be adapted on an economically viable production basis for forming substantially smaller holes in the silicon substrate or holes having the desired dimensional parameters for the higher resolution printheads. Another disadvantage of grit blasting is the sand and debris generated during the blasting process which is a potential source of contamination and the grit can impinge on electrical components on the chips causing electrical failures.
Wet chemical etching techniques may provide better dimensional control for etching of relatively thin semiconductor chips than grit blasting techniques. However, as the thickness of the wafer approaches 200 microns, tolerance difficulties increase significantly. In wet chemical etching, dimensions of the vias are controlled by a photolithographic masking process. Mask alignment provides the desired dimensional tolerances. The resulting ink vias have smooth edges which are free of cracks or fissures. Hence the chip is less fragile than a chip made by a grit blasting process. However, wet chemical etching is highly dependent on the thickness of the silicon chip and the concentration of the etchant which results in variations in etch rates and etch tolerances. The resulting etch pattern for wet chemical etching must be at least as wide as the thickness of the wafer. Wet chemical etching is also dependent on the silicon crystal orientation and any misalignment relative to the crystal lattice direction can greatly affect dimensional tolerances. Mask alignment errors and crystal lattice registration errors may result in significant total errors in acceptable product tolerances. Wet chemical etching is not practical for relatively thick silicon substrates because the entrance width is equal to the exit width plus the square root of 2 times the substrate thickness when using KOH and (100) silicon. Furthermore, the tolerances required for wet chemical etching are often too great for small or closely spaced holes because there is always some registration error with respect to the lattice orientation resulting in relatively large exit hole tolerances.
As advances are made in print quality and speed, a need arises for an increased number of heater resistors which are more closely spaced on the silicon chips. Decreased spacing between the heater resistors requires more reliable ink feed techniques for the individual heater resistors. As the complexity of the printheads continues to increase, there is a need for long-life printheads which can be produced in high yield while meeting more demanding manufacturing tolerances. Thus, there continues to be a need for improved manufacturing processes and techniques which provide improved printhead components.
With regard to the above and other objects the invention provides a method for making ink feed vias in semiconductor silicon substrate chips for an ink jet printhead. The method includes applying an etch stop layer to a first surface of the silicon chip having a thickness ranging from about 300 to about 800 microns, dry etching one or more ink vias through the thickness of the silicon chip up to the etch stop layer from a surface opposite the first surface and forming one or more through holes in the etch stop layer by a mechanical technique each through hole corresponding to a via of the one or more vias in order to fluidly connect the one or more through holes with the corresponding ink vias. Substantially vertical wall vias are etched through the thickness of the silicon chip using the method.
In another aspect the invention provides a silicon chip for an ink jet printhead. The silicon chip includes a device layer and a substrate layer, the device layer having a thickness ranging from about 1 to about 4 microns and the substrate layer having a thickness ranging from about 300 to about 800 microns. The device layer has an exposed surface containing a plurality of heater resistors defined by conductive, resistive, insulative and protective layers deposited on the exposed surface thereof. The silicon chip also includes at least one ink feed via corresponding to one or more heater resistors, the ink feed via being formed by dry etching through the substrate layer and having at least one through hole corresponding to each via opened by mechanical means in the device so that the at least one through hole individually fluidly connects with the corresponding ink feed via.
An advantage of the invention is that one or more ink via holes may be formed in a semiconductor silicon chip which meet demanding tolerances and provide improved ink flow to one or more heater resistors. Unlike grit blasting techniques, the ink vias are formed without introducing unwanted stresses or microscopic cracks in the semiconductor chips. Grit blasting is not readily adaptable to forming relatively narrow ink vias because the tolerances for grit blasting are too large or to forming a large number of individual ink vias in a semiconductor chip because each via must be bored one at a time. Deep reactive ion etching (DRIE) and inductively coupled plasma (ICP) etching, referred to herein as xe2x80x9cdry etchingxe2x80x9d, also provide advantages over wet chemical etching techniques because the etch rate is not dependent on silicon thickness or crystal orientation. Dry etching techniques are also adaptable to producing a larger number of ink vias which may be more closely spaced to corresponding heater resistors than ink vias made with conventional wet chemical etching and grit blasting processes.